1. Field of the Invention
This invention relates generally to electronic circuitry, and, more particularly, to a method and apparatus for providing a power-on-reset signal during periods of time when the power supply is activated, and/or when the voltage level of the power supply falls below a predetermined voltage level.
2. Description of the Related Art
In electronic circuits, such as CMOS or bipolar circuits, involving sequential logic design, it is often useful to initialize the states of logic elements, such as flip-flops, latches, counters, etc., to a known value when the power supply to those elements is turned on. It is also desirable to reset the states of such elements to a known value when a glitch occurs on the power supply or when the supply voltage falls below a certain threshold value. This reset signal is then turned off when supply voltage reaches a specified value. This operation is performed by what is commonly called a power-on-reset circuit
A desirable power-on-reset circuit should be capable of providing a reliable reset state of sufficient duration either on power-up or when the supply voltage falls below a specified threshold value, and this reset operation should be independent of the rise and fall time of the supply voltage. Further, the power-on-reset circuit should consume minimal static current and be easy to implement in existing technologies.
The present invention is directed to providing all of the above features.